I’ve used it a fair amount for memory mapped IO where the hardware defined bitfields. It is also useful when you have a data format with bitfields. I’d say it is also useful when your data does not respect byte boundaries, but the only time I’ve run into that involved the bit order being “backwards”, which means that I still had to bittwidle things back together.
From a performance perspective, a cache line is only 64 bytes. Space in registers, low level memory caches, and memory throughout are all limited as well.
In a world where a bigger memory chip is more expensive by only a few cents where this would be most useful, is this feature still relevant?
I’ve used it a fair amount for memory mapped IO where the hardware defined bitfields. It is also useful when you have a data format with bitfields. I’d say it is also useful when your data does not respect byte boundaries, but the only time I’ve run into that involved the bit order being “backwards”, which means that I still had to bittwidle things back together.
From a performance perspective, a cache line is only 64 bytes. Space in registers, low level memory caches, and memory throughout are all limited as well.